I just read my post of April 16, 2020. Since then I have made many modifications and now the architecture defines both a 32-bit sub-architecture (called ϕEng32) with 32-bit address spaces and a 64-bit sub-architecture (called ϕEng64) with 64-bit address spaces. The two sub-architectures share the same instruction set. The reason why ϕEngine is able to do that when most others can't (including x86, ARM and RISC-V) is because all address computations are done in special Address Registers and not integer registers. That frees the integer registers to support all types and sizes for both sub-architectures. ϕEngine is more orthogonal than x86 in that you can directly use all sub-parts of all registers as registers themselves. x86 can only do this to a very limited extent such as al and ah being the lower and upper halves of ax. But you can't use R8~R15 that way. And you can't even directly reach the 3rd or 4th order bytes in eax or even the upper half of eax as a 16-bit register. But you have direct access to all of them in ϕEngine. Not only that, you can reach all registers as 1, 2, 3, 4, 5, 6, 7 or 8-byte integers directly. One thing that makes ϕEngine far easier to program is that data size extension it built into the loads and stores so you don't need separate conversion instructions. They are built into the basic operations.
The focus of ϕEngine has changed from performance to memory efficiency for both code and data. ϕEngine processors consistently have denser code and need less memory to perform the same functions as other processors. All of the SW tools are written in C. I have once again begun to port code from WATCOM to Pelles. I waited a long time for WATCOM to support AMD64 and have decided that Pelles is the way to go.
I just finished rewriting a function I use a lot in the tool chain to zero-extend any integer to one of a larger size. After writing it in Pelles C assembly I wanted to see how much easier it was to write in ϕEngine assembly and compare the code densities. The AMD64 version is 43 bytes and the ϕEngine version did it in 27 bytes.
I assembled the x64 version to produce an assembly listing. It has a lot of space in it to make the columns aligned. I saved this same file into the ϕText format that I use for storing all ϕ System documentation and source code. The Pelles C listing takes up 3053 bytes while the ϕText encoded file occupies 1361 bytes. That is less that 45% the storage requirements.